Computer Architecture for AI and Robotics

<p>Follow Mara, a fictional embedded systems engineer at a startup called Halcyon Field Robotics, as she chooses and justifies the compute hardware for a vision model running on a warehouse robot and later a delivery drone. Along the way you'll build a real, first-principles understanding of CPU pipelining, the memory hierarchy and caching, why GPUs and NPUs are architected for parallel workloads instead of general-purpose flexibility, quantization and pruning, thermal throttling, end-to-end latency budgets, the roofline model and memory bandwidth, and how training hardware (GPUs and TPUs) differs from edge inference hardware. Every concept is introduced at the exact moment it's needed to make a concrete hardware-selection or optimization decision for a real robot with a real power, latency, and weight budget.</p>

Tools: Computer Architecture, CPU Pipelining, Memory Hierarchy & Caching, GPU/TPU Architecture, Embedded AI Hardware